1. Field of the Invention
The present invention relates to a mobile telecommunications system, and more particularly to an apparatus and method for receiving a quick paging message in a mobile station, which can minimize power consumption of the mobile station.
2. Description of the Related Art
Generally, in a code division multiple access (CDMA) mobile telecommunications system, such as an IS-95A mobile telecommunications system, a mobile station (MS) makes a transition from an idle sleep mode to a slotted mode for the monitoring of a paging channel only when there is a paging message directed to the MS from a base station (BS). In the slotted mode, the MS receives the paging message transmitted by the BS over the paging channel and then performs its operation based on the received paging message.
However, such a conventional method for receiving the paging message in the slotted mode has a disadvantage in that a sufficiently lengthy standby time, which is an essential requirement of the MS, can hardly be guaranteed because a large amount of power is consumed in performing a paging message re-acquisition operation and paging message reception operation. An IMT-2000 system, which is a 3rd generation mobile telecommunications system, employs a quick paging technique to decrease the MS power consumption such that the standby time is extended compared to that of an MS employing the conventional paging message reception method.
In the quick paging technique, a BS assigns a new forward quick paging channel (FQPCH) beside the paging channel to notify an MS of information about the presence or not of a paging message (i.e., paging/control message) transmitted over the forward quick paging channel on a slot basis. The BS transmits the information to the MS in a 1-bit message format without interleaving/encoding the information while the MS monitors the quick paging channel at an assigned location. The MS receives the 1-bit message at an assigned time without deinterleaving/decoding it. The MS then determines, based on the received 1-bit message, whether to monitor the paging channel. The quick paging message is repeatedly transmitted, for example, twice at every slot of 80 ms, that is, at intervals of 40 ms, typically at 9600 or 4800 bits per second (bps).
The 1-bit message is modulated by way of on-off keying (OOK) modulation, rather than binary-phase shift keying (BPSK) modulation. The reason for using the OOK modulation to modulate the 1-bit message is that if the BPSK is used to modulate the 1-bit message, the probability that data ‘1’ will be generated is small and, therefore, a signal transmission for transmitting data ‘0’ results in reduction in energy of different channels, thereby lowering the entire system performance. Therefore, the capability of the MS to receive the quick paging message is determined according to how accurately the OOK-modulated signal from the BS is demodulated. Referring to FIG. 1, a description will be given of an algorithm utilized for deciding two 1-bit messages in a demodulation process.
FIG. 1 is a view illustrating a general quick paging channel decision algorithm.
First, the MS demodulates a first bit (“Bit 1”) to detect whether it is ‘0’ (step 111). If the first bit is detected to be ‘0’ at step 111, then the MS is changed from a current state to an idle sleep state directly without demodulating a second bit (step 113). Alternatively, if the first bit is detected to be ‘1’ or ‘Erasure’ at the above step 111, then the MS demodulates the second bit to determine whether to make a transition to the idle sleep mode or to decode a paging channel (step 115) after transition to a slotted mode. The ‘Erasure’ is a bit, which is generated when a channel, or forward quick paging channel, is estimated to have a non-tolerable distortion, which ‘Erasure’ is determined to be ‘1’ regardless of the result of demodulation of a quick paging symbol. If the second bit is also detected to be ‘1’ or ‘Erasure’ at the above step 115, then the MS monitors the subsequent paging channel (step 117).
The above mentioned paging channel reception algorithm, which includes the idle sleep state transition, quick paging message reception and paging channel monitoring, is closely connected with MS power consumption for determining standby time of MS. The entire power consumption of the MS includes power consumption resulting from sleep current flowing in the idle sleep state, digital part power consumption, radio frequency (RF) part power consumption and so forth. In this regard, in order to extend the standby time of the MS, it is required to minimize the power consumption of each of the MS power components.
In particular, the sleep current can greatly affect MS power consumption negatively. The sleep current flows in the MS during reception of no message, resulting in MS power consumption. This sleep current is applied to an oscillator, liquid crystal display (LCD) unit, microprocessor, power supply, etc. of the MS. Especially, the use of a high frequency oscillator as a sleep counter, results in increase of the sleep current and a large amount of power being consumed. Consequently, there is a problem in that the standby time of the MS is reduced due to such sleep current.
In addition, upon reception of the quick paging message, if the MS having a single oscillator provides an identical clock speed of the oscillator as a reference clock, i.e., an operating clock regardless of a current mode, the elapsed time in receiving the quick paging message becomes longer because of the use of the identical clock speed of the oscillator, despite the MS rapidly receiving the quick paging message under the slotted mode.